| PART |
Description |
Maker |
| CY7C1314BV18-167BZXC |
18-Mbit QDRII SRAM 2 Word Burst Architecture 512K X 36 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| R1QFA7218AB R1QCA7218AB R1QCA7236AB R1QLA7236AB R1 |
72-Mbit QDRII SRAM 4-word Burst
|
Renesas Electronics Corporation
|
| CY7C1565V18-300BZI |
72-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1241V18 CY7C1243V18 CY7C1241V18-300BZC CY7C124 |
36-Mbit QDRII SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的国防评估报告⑩- II SRAM4字突发架构（2.0周期读写延迟
|
Cypress Semiconductor Corp.
|
| UPD44325084 UPD44325084F5-E50-EQ2 UPD44325094F5-E5 |
CABLE ASSEMBLY; LEAD-FREE SOLDER; SMA MALE TO SMA MALE; 50 OHM, RG142B/U COAX, DOUBLE SHIELDED
36M-BIT QDRII SRAM 4-WORD BURST OPERATION 36M条位推出QDRII SRAM4个字爆发运作
36M-BIT QDRII SRAM 4-WORD BURST OPERATION 36M条位推出QDRII SRAM个字爆发运作
4M X 8 QDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, PLASTIC, FBGA-165
|
NEC Corp.
NEC, Corp.
|
| CY7C1316BV18 CY7C1318BV18 CY7C1916BV18 CY7C1320BV1 |
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2字Burst结构,18-Mbit DDR-II SRAM) 18兆位的DDR - II SRAM字突发架构（2字突发结18 -兆位的DDR - II SRAM的）
18-Mbit DDR-II SRAM 2-Word Burst Architecture(2瀛?urst缁??,18-Mbit DDR-II SRAM)
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| UPD44325362F5-E50-EQ2 UPD44325082 UPD44325082F5-E4 |
36M-BIT QDRII SRAM 2-WORD BURST OPERATION
|
NEC[NEC]
|
| UPD44165364F5-E60-EQ1 UPD44165084 UPD44165084F5-E4 |
18M-BIT QDRII SRAM 4-WORD BURST OPERATION
|
NEC[NEC]
|
| CY7C1415BV18-250BZI CY7C1415BV18-167BZI |
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 1M X 36 QDR SRAM, 0.45 ns, PBGA165
36-Mbit QDR™-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
256K (32K x 8) Static RAM
256 Kb (256K x 1) Static RAM
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
| HM66AEB18204BP-33 HM66AEB18204BP-40 HM66AEB18204BP |
Memory>Fast SRAM>QDR SRAM
36-Mbit DDR II SRAM 4-word Burst
|
Renesas Technology / Hitachi Semiconductor
|
